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	Codasip vlog 2, part 3: The CodAL Language (Codasip) View
	Codasip vlog 2, part 1: Introduction to Domain-Specific Accelerators (Codasip) View
	Codasip vlog 1, part 6b: PPA numbers – how to improve them (Codasip) View
	Codasip vlog 1, part 5: Codasip's application processors (Codasip) View
	Codasip vlog 1, part 6a: PPA u0026processor benchmarks – how to make sense of them (Codasip) View
	FAQ: Addressing Memory and Memory View (Codasip) View
	Customizing RISC-V cores to accelerate neural networks \| Jon Taylor at EW22 (Codasip) View
	RISC-V Booth Presentation at Embedded World 2020: Codasip (RISC-V International) View
	Codasip's story u0026 unique technology for processor customization – RISC-V Summit 2020 (Codasip) View
	1630 Codasip, Automatic Compiler Generation for RISC-V ISA Customization(Tomonari Tohara) (RISC-V Alliance Japan) View