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CSULB CECS 201 : Up Down Counter part 3 ( Clock Divider) (A Byte With Lina) View |
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CSULB CECS 201 : Up Down Counter part 2 ( Counter) (A Byte With Lina) View |
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CSULB CECS 201 : Up Down Counter part 4 (Top Module) (A Byte With Lina) View |
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CSULB CECS 201 : Up Down Counter part 1 ( Hex Display) (A Byte With Lina) View |
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CSULB CECS 201 : Making a 4 bit Synchronous Counter (A Byte With Lina) View |
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CSULB CECS 201: Making a simple testbench (A Byte With Lina) View |
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CSULB CECS 201 : Loading your bit file on to the Board (A Byte With Lina) View |
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201 LectureTwo (John Tramel) View |
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CSULB CECS 201 : Loading the Testbench into the Project (A Byte With Lina) View |
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CSULB CECS 201 : Begining of Verilog a Simple AND gate (A Byte With Lina) View |