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	DDCA Ch7 - Part 3: RISC-V Single-Cycle Processor Datapath: Extending Instructions (Sarah Harris) View
	DDCA Ch7 - Part 2: RISC-V Single-Cycle Processor Datapath: lw (Sarah Harris) View
	DDCA Ch7 - Part 4: RISC-V Single-Cycle Processor: Control (Sarah Harris) View
	DDCA Ch7 - Part 5: RISC-V Single-Cycle Processor: Adding Instructions (Sarah Harris) View
	DDCA Ch7 - Part 11: Extending the RISC-V Multicycle Processor (Sarah Harris) View
	DDCA Ch7 - Part 7: Multicycle Processor: Datapath for lw (Sarah Harris) View
	DDCA Ch7 - Part 9: RISC-V Multicycle Processor Control: lw (Sarah Harris) View
	DDCA Ch7 - Part 1: Microarchitecture Introduction (Sarah Harris) View
	DDCA Ch7 - Part 6b: RISC-V Single-Cycle Processor Verilog (Sarah Harris) View
	DDCA Ch7 - Part 10: RISC-V Multicycle Processor Control: Other Instructions (Sarah Harris) View