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	Exp-2b- CMOS Nand Gate Layout design using Microwind Software (Vinay Sharma) View
	Experiment: 8.a \|\| CMOS NAND GATE \|\| Schematic \| Layout \| DSCH 3.1 \| Microwind (Maharshi Sanand Yadav T) View
	Layout design of Two input NAND logic using Microwind (smita kadam) View
	EXPERIMENT 3 LAYOUT OF 2 INPUT CMOS NAND GATE (Sumita Gupta) View
	Exp-2a-NAND Gate design using DSCH u0026 Winspice Simulation (Vinay Sharma) View
	Lab Class: Microwind Lecture 2 (Abir Akib) View
	PRACTICAL WORK 3 - DESIGN THE LAYOUT AND SIMULATING THE NAND GATE USING MICROWIND. (NOR WINDA BINTI ISMAIL) View
	Exp-1b-CMOS Inverter Layout Simulation using Microwind Software (45nm Technology) (Vinay Sharma) View
	CMOS Inverter layout on Microwind (Ravikumar Nakka) View
	Exp-3b-CMOS Layout simulation of Common Source Amplifier using Microwind Layout (Vinay Sharma) View