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From TensorFlow to RTL in three months (Cadence Design Systems) View |
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Mapping Google TensorFlow Neural Network Classifiers on FPGAs project screencast (AdanehadKM) View |
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Better Quality RTL (Register Transfer Language) (Semiconductor Engineering) View |
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Joel Grus- Ten Ways To Fizz Buzz| PyData Global 2020 (PyData) View |
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ESP tutorial - How to: design an accelerator in Keras/Pytorch/ONNX (ESP) View |
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Visual Pattern Recognition with on On-chip Learning: towards a Fully Neuromorphic Approach (Yulia Sandamirskaya) View |
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Getting Software Through An HLS Flow (Semiconductor Engineering) View |
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LeFlow (Daniel Holanda Noronha) View |
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Machine Learning Based Solutions in JasperGold - Habeeb Farah, Cadence Design Systems (SemIsrael - The Israeli Semiconductor Portal) View |
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Neural Networks on FPGA: Part 9: Generating weights, biases and test data from TensorFlow (Vipin Kizheppatt) View |