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	sec 12 10 VHDL and LPM Counters (BillKleitz) View
	sec 12 03b vhdl Design of Divide-by-N Counters Using VHDL (BillKleitz) View
	sec 07 11vhdl a FPGA Applications with VHDL and LPM (BillKleitz) View
	sec 10 10 vhdl Using Altera's LPM Flip-Flop (BillKleitz) View
	sec 07 11vhdl c FPGA Applications with VHDL and LPM (BillKleitz) View
	sec 07 11vhdl b FPGA Applications with VHDL and LPM (BillKleitz) View
	9.4(d) - Counters in VHDL w/ Loads (Digital Logic \u0026 Programming) View
	sec 13 11 vhdl Using the LPM Shift register and 74194 Macrofunction (BillKleitz) View
	sec 12 02 Ripple Counters JK FFs and VHDL Description (BillKleitz) View
	sec 12 06 VHDL Seven Segment Decoder/Driver Using VHDL (BillKleitz) View