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Speech Recognition using Altera Cyclone II FPGA designed using NIOS 2 and verilog (Kaustubh Pande) View |
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Altera Cyclone II FPGA (EP2C5Q208) (IC Tech) View |
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Altera Cyclone II Board (Gary George) View |
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Altera Cyclone II FPGA Starter Board (John B) View |
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Digital lock with voice recognition option using MATLAB and Verilog synchronization (Md Tasnimul Hasan) View |
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SOC DEMO (Qing Chang) View |
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Manual Nios II IDE, Parte SW (FPGA Lover) View |
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Low Power/High Performance Speech Recognition Solution In The Form Of Synthesizable Core (Amit Joshi) View |
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GESTURE RECOGNITION USING NEURAL NETWORKS BASED ON HW/SW CO-SIMULATION PLATFORM (VERILOG COURSE TEAM) View |
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NIOS II Cyclone II VHDL.avi (VideosSuky) View |